Using JFET as Synchronous Rectifier to Achieve High Efficiency at High Frequency for Future VRM

 

This invention disclosure proposed a JFET based buck converter with the targets to eliminate body diode conduction loss and to reduce gate driver loss of synchronous rectifier. A self-driven scheme is used to ensure there is no dead time between the top switch and the bottom JFET in the circuit, and gate driver loss is greatly reduced by connecting the gate to the low output voltage. The simulation results show the circuit works well and can achieve the above benefits. A preliminary experiment result also demonstrates that this concept can work.

 

 

 

 

Patent Information:
App Type Country Serial No. Patent No. File Date Issued Date Patent Status
US Utility *United States 11/094,438 7,265,525 3/31/2005 9/4/2007 Abandoned
Category(s):
Electrical
For Information, Contact:
Li Chen
Licensing Associate
Virginia Tech Intellectual Properties, Inc.
(540) 443-9217
lchen@vtip.org
Inventors:
Ming Xu
Julu Sun
Jinghai Zhou
Fred Lee
Keywords:
Electronics