Program and Erase Operations of a Floating Electrode Bi-resistive Device Using Compliance Current Constraint

Description:

A novel memristive floating electrode device (MFED) is disclosed. This MFED consists of two conventional resistive switches with a merged inert metal electrode. The resulting I-V hysteresis curve is flexibly engineered with the appropriate choice of two binary switches. For properly designed single switches, there is a finite voltage window for the MFED where metal bridges form in both switches simultaneously and render the entire device conductive. The three other cases where a single bridge exists in either switch, or no bridge at all exists, render the MFED non-conductive. OWEh

 The new device has been implemented using crossbar structures Cu-Ta2O5-Pt-TaOx-Cu with 32 nm of Ta2O5 and 32 nm of oxygen-deficient TaOx.   The MFED is a feasible alternative to traditional complementary metal–oxide–semiconductor (CMOS) device technology which is reaching physical limits in terms of ability to scale to ever smaller feature sizes. The ability to scale MFEDs to even smaller sizes can continue to the evolution of ever faster and less costly devices that consume less power.

 

A simple solid-state circuit has been manufactured that demonstrates hardware learning and unlearning depending on the input signal history. The output signal of the prototype circuit shows in the learning operation 4 discrete current levels spanning 6 orders of magnitude. The current output (and voltage for an appropriate load) proceeds in a time-cascade will proceed in a cascaded manner at predetermined times and with predetermined current levels. Using appropriate materials, specific threshold current transitions can be engineered depending on the application. The proposed switch circuit allows system intervention for accelerated learning, partial and complete unlearning. The entire circuit is very compact and is integrable in a crossbar array occupying only three adjacent crossbar intersections (or cells). Its reduced version allows partial and full learning cycle but only partial unlearning can be accommodated in a single crossbar intersection (single cell). It is recognized that crossbar array is the densest array to accommodate switches or memory cells far beyond today's CMOS densities The demonstrated circuit can be dynamically configured itself in response to the input signals. The circuit works as short-term and long-term memory, depending on the history of input. The circuit is a prototype for more complex circuits thus enabling the creation of integrated hardware with inherent learning and unlearning ability without the unwieldy software overhead.

 

A volatile switching of conductive bridge resistive devices has been observed, for the first time, in Cu/TaOx/ -Cu/Pt devices. This device differs from a conventional Cu/TaOx/Pt device by the insertion of a thin Cu-layer between the electrolyte and the inert Pt. electrode. The conductive Cu filament (CF) is formed the same way as in the conventional nonvolatile devices. However, when applied voltage becomes zero or close to zero, CF ruptures spontaneously. The new effect of CF volatility is explained by the dynamic balance between Cu+ field-supported hopping transport and the Cu self-diffusion. Under low compliance current the volatile resistive switching behavior is characterized by a single slope reflecting the Ron,1 resistance of the Cu bridge. Under high compliance current, another new phenomenon is observed as the switching behavior is characterized by two slopes Ron,1 and Ron,2 where Ron,2 ~ 10xRon,1. The device can be transitioned in a controlled way from volatile to nonvolatile switching behavior and vice versa.

Patent Information:
Category(s):
Computer Hardware
For Information, Contact:
Mike Miller
Senior Licensing Manager
Virginia Tech Intellectual Properties, Inc.
(540) 443-9228
mmiller@vtip.org
Inventors:
Marius Orlowski
Yuhong Kang
Keywords:
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