Parasitic Inductances Coupling to Reduce Transient Current Unbalance in Semiconductor Power Switches

Description:

Switching power devices, specifically SiC MOSFET, has wider parameter variations (Vth, Rds(on))  due to fabrication process: therefore, when putting several MOSFET dies together in parallel in a power module, there will be current/power unbalance when they are being used. Several publications have mentioned about using different control techniques to actively reduce unbalance. However, these controls are usually quite complicated and not so practical in reality. This ID presents an alternative method to passively reduce the unbalance by carefully designing the power device/module parasitics. By using coupling between different inductances among different switches, the transient current unbalance can be greatly reduced.

Patent Information:
For Information, Contact:
Li Chen
Licensing Associate
Virginia Tech Intellectual Properties, Inc.
(540) 443-9217
lchen@vtip.org
Inventors:
Yincan Mao
Zichen Miao
Khai Ngo
Chi Ming Wang
Keywords:
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